According to a nano-imprint technique, a template is placed adjacent to a semiconductor wafer including a resist dropped thereon, such that rugged patterns formed on the main face of the template on the semiconductor wafer side are filled with the resist, and then the resist is cured. Then, the template is separated, so that rugged patterns are formed on the semiconductor wafer.
At imperfect shot areas where part of the template is present outside the semiconductor wafer, the bevel surface is poor in flatness, and so the bevel surface is in different states at respective shot positions. Consequently, a film thickness difference is generated in the thickness of the resist between the template and the semiconductor wafer (this thickness will be referred to as RLT). When the template is moved relative to the semiconductor wafer in a lateral direction during die-by-die alignment, the template comes into contact with the RLT at an adjacent imperfect shot area, which has already been cured, and a shear force is thereby generated on the template and the semiconductor wafer. Further, along with a decrease in the RLT, the resist comes to behave as an elastic body, and thereby increases the shear force acting on the template and the semiconductor wafer. Accordingly, the flatness of the bevel surface has a great influence on the shear force generated during the die-by-die alignment.
Furthermore, at the imperfect shot areas, the template has a large deformation amount by itself, and the deformation amount of the template is hard to estimate. As a result, this problem causes deterioration of the overlay accuracy between the semiconductor wafer and the imprint patterns.